1. Field of the Invention
The invention relates to flash EPROM memory, in particular to a method and apparatus of improved programming of flash EPROM memory.
2. Description of Related Art
EPROM memory is electrically erasable programmable read only memory. Such memory has an advantage of retaining its contents even when the power is turned off. Flash memory is a kind of EPROM that typically can be reprogrammed and erased in blocks at a time. A flash memory cell typically includes a drain region, source region, and a channel between the drain and source. A floating gate is typically disposed above the channel. A control gate is typically disposed above the floating gate. A cell is programmed by bringing electric charge, in the form of electrons, onto the floating gate.
Various programming methods have been proposed for programming flash EPROMs. Programming a flash EPROM requires electric current. Some of the goals of improved programming of flash EPROM include reducing the program current and increasing the program efficiency.
For example, to improve programming, a resistor may be connected to the source side of cells to bias the source junction. According to another method, a diode or resistor may be placed at the source side of a cell with a feedback circuit to control gate voltage of cells being programmed to further compact the threshold voltage distribution. In another method, the source junction of the cells is biased by applying a source bias that is varied with the conductivity of reference cells to track process variation. For examples of EPROM systems, please see the following patents, which are incorporated herein by reference: U.S. Pat. No. 5,487,033 by S. Keeney; U.S. Pat. No. 5,533,020 by S. Keeney; U.S. Pat. No. 5,467,306 by C. Kaya; and U.S. Pat. No. 5,218,571 by C. Norris.